AMPLEX-SiCAL

This paper reports on an analog signal processor using commercial 3 μm CMOS technology which has been designed and produced for the silicon luminosity calorimeter SiCAL of the ALEPH experiment. This processor is a modified version of the AMPLEX integrated circuit designed for the inner silicon detector of the UA-2 experiment. The output voltage swing has been increased to more than 5.5 Volt as required for the large dynamic range of 1000 MIPs or 3.8 pC2. A fast analog summation, based on a neural network principle called follower aggregation, computes the average input charges for triggering purposes. The chip contains 16 channels, with a charge amplifier, shaper, track-and-hold stage, multiplexer, fast analog sum and a calibration system. The power consumption of the overall chip is 100 mW. The equivalent noise charge is less than 0.13MIP (0.5 fC rms) for a 50 pF detector capacitance, and the peaking time is about 250ns