Published July 2003
| Version v1
Journal article
Architectural design and analysis of a programmable image processor
Creators
- 1. Nanyang Technical University, Singapore (Singapore). School of Electrical and Electronic Engineering
- 2. Mehran University of Engineering and Technology, Jamshoro (Pakistan). Dept. of Electronic and Telecommunication Engineering
- 3. Mehran University of Engineering and Technology, Jamshoro (Pakistan). Dept. of Computer Systems and Software Engineering
Description
In this paper we present an architectural design and analysis of a programmable image processor, nicknamed Snake. The processor was designed with a high degree of parallelism to speed up a range of image processing operations. Data parallelism found in array processors has been included into the architecture of the proposed processor. The implementation of commonly used image processing algorithms and their performance evaluation are also discussed. The performance of Snake is also compared with other types of processor architectures. (author)
Additional details
Publishing Information
- Journal Title
- Mehran University Research Journal of Engineering and Technology
- Journal Volume
- 22
- Journal Issue
- 3
- Journal Page Range
- p. 175
- ISSN
- 0254-7821
INIS
- Country of Publication
- Pakistan
- Country of Input or Organization
- Pakistan
- INIS RN
- 35003718
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
- Descriptors DEI
- COMPUTER ARCHITECTURE; COMPUTER NETWORKS; DATA PROCESSING; IMAGE PROCESSING; PARALLEL PROCESSING; REAL TIME SYSTEMS
- Descriptors DEC
- PROCESSING; PROGRAMMING