Published December 5, 2005 | Version v1
Journal article

Improved thermal stability and hole mobilities in a strained-Si/strained-Si1-yGe y/strained-Si heterostructure grown on a relaxed Si1-xGe x buffer

  • 1. Department of Materials Science and Engineering, Massachusetts Institute of Technology, 13-5149, 77 Mass. Ave., Cambridge, MA 02139 (United States)

Description

A dual channel heterostructure consisting of strained-Si/strained-Si1-yGe y on relaxed Si1-xGe x (y > x), provides a platform for fabricating metal-oxide-semiconductor field-effect transistors (MOSFETs) with high hole mobilities (μ eff) which depend directly on Ge concentration and strain in the strained-Si1-yGe y layer. Ge out-diffuses from the strained-Si1-yGe y layer into relaxed Si1-xGe x during high temperature processing, reducing peak Ge concentration and strain in the strained-Si1-yGe y layer and degrades hole μ eff in these dual channel heterostructures. A heterostructure consisting of strained-Si/strained-Si1-yGe y/strained-Si, referred to as a trilayer heterostructure, grown on relaxed Si1-xGe x has much reduced Ge out-flux from the strained-Si1-yGe y layer and retains higher μ eff after thermal processing. Improved hole μ eff over similar dual channel heterostructures is also observed in this heterostructure. This could be a result of preventing the hole wavefunction tunneling into the low μ eff relaxed Si1-xGe x layer due to the additional valence band offset provided by the underlying strained-Si layer. A diffusion coefficient has been formulated and implemented in a finite difference scheme for predicting the thermal budget of the strained SiGe heterostructures. It shows that the trilayer heterostructures have superior thermal budgets at higher Ge concentrations. Ring-shaped MOSFETs were fabricated on both platforms and subjected to various processing temperatures in order to compare the extent of μ eff reduction with thermal budget. Hole μ eff enhancements are retained to a much higher extent in a trilayer heterostructure after high temperature processing as compared to a dual channel heterostructure. The improved thermal stability and hole μ eff of a trilayer heterostructure makes it an ideal platform for fabricating high μ eff MOSFETs that can be processed over higher temperatures without significant losses in hole μ eff

Additional details

Identifiers

DOI
10.1016/j.mseb.2005.08.051;
PII
S0921-5107(05)00499-X;

Publishing Information

Journal Title
Materials Science and Engineering. B, Solid-State Materials for Advanced Technology
Journal Volume
124-125
Journal Page Range
p. 102-106
ISSN
0921-5107
CODEN
MSBTEK

Conference

Title
Materials science and device issues for future Si-based technologies
Acronym
E-MRS 2005, Symposium D
Dates
31 May - 3 Jun 2005
Place
Strasbourg (France)

Optional Information

Copyright
Copyright (c) 2005 Elsevier Science B.V., Amsterdam, The Netherlands, All rights reserved.