A programmable artificial retina

An artificial retina is a device that intimately associates an imager with processing facilities on a monolithic circuit. Yet, except for simple environments and applications, analog hardware will not suffice to process and compact the raw image flow from the photosensitive array. To solve this output problem, an on-chip array of bare Boolean processors with halftoning facilities might be used, providing versatility from programmability. By setting the pixel memory size to 3 b, the authors have demonstrated both the technological practicality and the computational efficiency of this programmable Boolean retina concept. Using semi-static shifting structures together with some interaction circuitry, a minimal retina Boolean processor can be built with less than 30 transistors and controlled by as few as 6 global clock signals. The successful design, integration, and test of such a 65x76 Boolean retina on a 50-mm2 CMOS 2-μm circuit are presented