Published November 1, 2011 | Version v1
Journal article

High performance QVCO design with series coupling in CMOS technology

  • 1. Department of Electronics Engineering and Information Science, University of Science and Technology of China, Hefei 230027 (China)
  • 2. Department of Electronic Science and Technology, University of Science and Technology of China, Hefei 230027 (China)

Description

A high performance quadrature voltage-controlled oscillator (QVCO) is presented. It has been fabricated in SMIC 0.18 μm CMOS technology with top thick metal. The proposed QVCO employed cascade serial coupling for in phase and quadrature phase signal generation. Source degeneration capacitance is added to the NMOS differential pair to suppress their flicker noise from up-conversion to close in phase noise. A dedicated low noise and high power supply rejection low drop out regulator is used to supply this QVCO. The measured phase noise of the proposed QVCO achieves phase noise of −123.3 dBc/Hz at an offset frequency of 1 MHz from the carrier of 4.78 GHz, while the QVCO core circuit and LDO draw 6 mA from a 1.8 V supply. The QVCO can operate from 4.09 to 4.87 GHz (17.5%). Measured tuning gain of the QVCO (Kvco) spans from 44.5 to 66.7 MHz/V The chip area excluding the pads and ESD protection circuit is 0.41 mm2. (semiconductor integrated circuits)

Availability note (English)

Available from http://dx.doi.org/10.1088/1674-4926/32/11/115004

Additional details

Publishing Information

Journal Title
Journal of Semiconductors
Journal Volume
32
Journal Issue
11
Journal Page Range
[6 p.]
ISSN
1674-4926