Published February 2010 | Version v1
Book

Functional verification of floating point arithmetic unit

  • 1. Electronics Instrumentation Division, Indira Gandhi Centre for Atomic Research, Kalpakkam (India)
  • 2. Computer Science Engineering Department, Indian Institute of Technology Madras, Chennai (India)

Description

For continuous real-time reactivity monitoring of PFBR reactivity safety channel, a FPGA based reactivity meter has been developed by Electronics Division, BARC. Verification of designs involved in Safety Critical systems is very important and necessary. Functional verification of this design is presently carried out by EID, IGCAR. In Reactivity meter, Floating Point Arithmetic Unit (FPAU) is a major and very important sub module, which needs to be completely verified first. Two types of verifications are possible: Functional verification and Formal verification. This paper discusses and shares the experiences of functional verification of FPAU module for all special floating point numbers. (author)

Part of:
Proceedings of DAE-BRNS national symposium on nuclear instrumentation - 2010

Additional details

Publishing Information

Publisher
Dept. of Atomic Energy
Imprint Place
Mumbai (India)
ISBN
81-88513-33-4
Imprint Title
Proceedings of DAE-BRNS national symposium on nuclear instrumentation - 2010
Imprint Pagination
679 p.
Journal Page Range
p. 474-477

Conference

Title
national symposium on nuclear instrumentation
Acronym
NSNI 2010
Dates
24-26 Feb 2010
Place
Mumbai (India)

Optional Information

Notes
10 refs., 4 figs., 2 tabs.