Investigation of radiation hardness improvement by applying back-gate bias for FD-SOI MOSFETs

Radiation hardness improvement of fully depleted silicon on insulator (FD-SOI) metal-oxide-silicon field effect transistors (MOSFETs) has been investigated in terms of back-gate bias recovering to compensate generated positive charge in buried oxide (BOX) by X-ray irradiation. In general, the radiation tolerance of FD-SOI MOSFETs is low in total ionizing dose (TID) due to the generated positive charge in BOX. However, biasing the back-gate to negative can compensate the charge. In the method, the electrode of back-gate should cover both N and P channel different gate length MOSFETs to minimize area penalty. To reduce the gate length dependent characteristic change by the irradiation, high dose lightly doped drain (LDD) is newly introduced. The back-gate bias windows within 100 mV in the threshold voltage and 15% in the drain current change up to 112 kGy(Si) X-ray irradiation has been confirmed for the N and P channel MOSFETs of wide gate length range from 0.2 to 10 $\mu$m.