Published June 14, 2006
| Version v1
Journal article
Vertical wrap-gated nanowire transistors
- 1. Department of Solid State Physics/Nanometre Structure Consortium, Lund University, Box 118 SE-221 00, Lund (Sweden)
Description
We present a process for fabricating a field-effect transistor based on vertically standing InAs nanowires and demonstrate initial device characteristics. The wires are grown by chemical beam epitaxy at lithographically defined locations. Wrap gates are formed around the base of the wires through a number of deposition and etch steps. The fabrication is based on standard III-V processing and includes no random elements or single nanowire manipulation
Availability note (English)
Available online at http://stacks.iop.org/0957-4484/17/S227/nano6_11_S01.pdf or at the Web site for the journal Nanotechnology (Print) (ISSN 1361-6528 ) http://www.iop.org/Additional details
Identifiers
- URL
- http://stacks.iop.org/0957-4484/17/S227/nano6_11_S01.pdf; http://www.iop.org/;
- DOI
- 10.1088/0957-4484/17/11/S01;
- PII
- S0957-4484(06)16429-6;
Publishing Information
- Journal Title
- Nanotechnology (Print)
- Journal Volume
- 17
- Journal Issue
- 11
- Journal Page Range
- p. S227-S230
- ISSN
- 0957-4484
INIS
- Country of Publication
- United Kingdom
- Country of Input or Organization
- International Atomic Energy Agency (IAEA)
- INIS RN
- 38003913
- Subject category
- S75: CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY;
- Descriptors DEI
- DEPOSITION; EPITAXY; FABRICATION; FIELD EFFECT TRANSISTORS; INDIUM ARSENIDES; QUANTUM WIRES; RANDOMNESS
- Descriptors DEC
- ARSENIC COMPOUNDS; ARSENIDES; CRYSTAL GROWTH METHODS; INDIUM COMPOUNDS; NANOSTRUCTURES; PNICTIDES; SEMICONDUCTOR DEVICES; TRANSISTORS