High performance top-gated indium–zinc–oxide thin film transistors with in-situ formed HfO₂ gate insulator

We report on top-gated indium–zinc–oxide (IZO) thin film transistors (TFTs) with an in-situ formed HfO₂ gate dielectric insulator. Building on our previous demonstration of high-performance IZO TFTs with Al₂O₃/HfO₂ gate dielectric, we now report on a one-step process, in which Hf is evaporated onto the 20 nm thick IZO channel, forming a partially oxidized HfO_x layer, without any additional insulator in-between. After annealing in air at 300 °C, the in-situ reaction between partially oxidized Hf and IZO forms a high quality HfO₂ gate insulator with a low interface trapped charge density N_TC ~ 2.3 × 10¹¹ cm⁻² and acceptably low gate leakage < 3 × 10⁻⁷ A/cm² at gate voltage V_G = 1 V. The annealed TFTs with gate length L_G = 50 μm have high mobility ~ 95 cm²/V ∙ s (determined via the Y-function technique), high on/off ratio ~ 10⁷, near-zero threshold voltage V_T = − 0.02 V, and a subthreshold swing of 0.062 V/decade, near the theoretical limit. The on-current of our proof-of-concept TFTs is relatively low, but can be improved by reducing L_G, indicating that high-performance top-gated HfO₂-isolated IZO TFTs can be fabricated using a single-step in-situ dielectric formation approach. - Highlights: • High-performance indium–zinc–oxide (IZO) thin film transistors (TFTs). • Single-step in-situ dielectric formation approach simplifies fabrication process. • During anneal, reaction between HfO_x and IZO channel forms a high quality HfO₂ layer. • Gate insulator HfO₂ shows low interface trapped charge and small gate leakage. • TFTs have high mobility, near-zero threshold voltage, and a low subthreshold swing.