A VLSI based architecture for scientific computation

This paper investigates methodologies for the efficient solution of partial differential equations on a highly parallel VLSI based computer. The work differs from existing architectures in its extensive use of statically scheduled control. Statically scheduled control is used to control the flow of data through the interconnection network and to route data through high performance pipelined functional units. Once a highly optimized parallel program schedule has been generated control and address information is distributed to the appropriate PE where it resides during execution