Custom solution for a data readout architecture: A system level simulation

Behavioral simulations of data readout architecture based on VME and custom high speed buses show that it is suitable as data acquisition and event building system for high energy physics experiments. This paper describes a reliable but simple auxiliary bus designed to afford asynchronous transactions up to 10 Mtransfers/s, sparse data scan operations and crate-level event building. An intercate connection is also presented to accomplish system level event building and data concentration by means of synchronous transactions of rates up to 10 Mtransfers/s. This architecture has been simulated using Verilog HDL. Preliminary performance estimates are presented and briefly discussed in view of system application in KLOE experiment at the DAΦNE Φ-factory in Frascati (Italy)