Published October 1992
| Version v1
Report
Restricted
FASTBUS Standard Routines implementation for Fermilab embedded processor boards
Creators
- 1. Fermi National Accelerator Lab., Batavia, IL (United States)
- 2. Southeastern Universities Research Association, Inc., Newport News, VA (United States). Continuous Electron Beam Accelerator Facility
Description
In collaboration with CEBAF, Fermilab's Online Support Department and the CDF experiment have produced a new implementation of the IEEE FASTBUS Standard Routines for two embedded processor FASTBUS boards: the Fermilab Smart Crate Controller (FSCC) and the FASTBUS Readout Controller (FRC). Features of this implementation include: portability (to other embedded processor boards), remote source-level debugging, high speed, optional generation of very high-speed code for readout applications, and built-in Sun RPC support for execution of FASTBUS transactions and lists over the network
Availability note (English)
MF available from INIS under the Report Number; OSTI as DE93004423; NTIS; INIS; US Govt. Printing Office Dep.
Files
Additional details
Publishing Information
- Imprint Pagination
- 5 p.
- Report number
- FNAL/C--92/296
Conference
- Title
- Nuclear science symposium.
- Dates
- 26-31 Oct 1992.
- Place
- Orlando, FL (United States).
INIS
- Country of Publication
- United States
- Country of Input or Organization
- United States
- INIS RN
- 24033687
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- COMPUTER NETWORKS; DATA ACQUISITION SYSTEMS; FASTBUS SYSTEM; FERMILAB COLLIDER DETECTOR; FERMILAB TEVATRON; ON-LINE SYSTEMS; PROGRAMMING
- Descriptors DEC
- ACCELERATORS; CYCLIC ACCELERATORS; MEASURING INSTRUMENTS; RADIATION DETECTORS; SYNCHROTRONS
Optional Information
- Contract/Grant/Project number
- Contract AC02-76CH03000
- Funding organization
- USDOE, Washington, DC (United States).
- Secondary number(s)
- CONF-921005--11.