Published 1988
| Version v1
Book
Submicron wiring technology with tungsten and planarization
- 1. IBM Gen. Tech. Div., Essex Junction, VT (USA)
Description
A submicron wiring technology has been designed, built, and proven reliable. This fully integrated technology features CVD-tungsten (W) and planarization. Vertical W studs maximize density by reducing contact/via ground rules and by facilitating the use of thick insulators for minimum capacitance. Complementary insulator and W planarization eliminates steps and ease patterning. As a result, circuit performance is enhanced without sacrificing yield or reliability
Additional details
Publishing Information
- Publisher
- IEEE Service Center.
- Imprint Place
- Piscataway, NJ (USA)
- Imprint Title
- 1988 proceedings of the fifth international IEEE VLSI multilevel interconnection conference
- Journal Page Range
- p. 21-28.
Conference
- Title
- 5. IEEE international VLSI multilevel interconnection conference.
- Dates
- 13-14 Jun 1988.
- Place
- Santa Clara, CA (USA).
INIS
- Country of Publication
- United States
- Country of Input or Organization
- United States
- INIS RN
- 20055731
- Subject category
- S36: MATERIALS SCIENCE; S36: MATERIALS SCIENCE; S42: ENGINEERING;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- CHEMICAL VAPOR DEPOSITION; DENSITY; ELECTRIC CONDUCTIVITY; ELECTRIC CONTACTS; ELECTRICAL INSULATION; ELECTRICAL INSULATORS; FABRICATION; INTEGRATED CIRCUITS; TUNGSTEN; VAPOR DEPOSITED COATINGS; WIRES
- Descriptors DEC
- CHEMICAL COATING; COATINGS; DEPOSITION; ELECTRICAL EQUIPMENT; ELECTRICAL PROPERTIES; ELECTRONIC CIRCUITS; ELEMENTS; EQUIPMENT; METALS; PHYSICAL PROPERTIES; SURFACE COATING; TRANSITION ELEMENTS