Technology challenges for ultrasmall silicon MOSFET's

Work on silicon MOSFET devices scaled down to half-micron dimensions is gathering momentum in research labs for VLSI applications. Further reductions in device geometries by only a factor of two will bring us to the edge of some fundamental barriers to miniaturization. Design requirements for very thin layers in the device structure lead to resistance effects, statistical fluctuation of doping impurities, and increased concern for interface properties. Scaling down of applied voltage is difficult because built-in junction potentials and other small voltage terms are no longer negligible. Increased susceptibility to spurious operation or permanent damage from alpha particles, cosmic particles, or other high-energy radiation is reviewed