Published August 1994
| Version v1
Journal article
An integrated 16-channel CMOS time to digital converter
- 1. CERN, Geneva (Switzerland)
Description
An integrated 16-channel Time to Digital Converter (TDC) for use in the NA48 experiment at CERN has been developed in a 1μm CMOS technology. The resolution is 1.56ns and the total time history is 204.8ms. Buffering of up to 128 hits is done in on-chip FIFOs. The chip area is 25 mm2. The vernier circuit consists of a 16-tap voltage-controlled delay chain controlled by a Delay Locked Loop (DLL). Read out is possible at 40 MHz. JTAG/IEEE 1149.1 protocol has been incorporated to allow in-site testing of the chip. The JTAG data path is also used to access internal control and status registers
Additional details
Publishing Information
- Journal Title
- IEEE Transactions on Nuclear Science
- Journal Volume
- 41
- Journal Issue
- 4Pt1
- Journal Page Range
- p. 1104-1108.
- ISSN
- 0018-9499
- CODEN
- IETNAE
Conference
- Title
- nuclear science symposium and medical imaging conference.
- Acronym
- NSS-MIC '93
- Dates
- 30 Oct - 6 Nov 1993.
- Place
- San Francisco, CA (United States).
INIS
- Country of Publication
- United States
- Country of Input or Organization
- United States
- INIS RN
- 26026286
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; S43: PARTICLE ACCELERATORS;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- ANALOG-TO-DIGITAL CONVERTERS; DATA ACQUISITION SYSTEMS; DESIGN; HIGH ENERGY PHYSICS; INTEGRATED CIRCUITS; MAGNETIC SPECTROMETERS; READOUT SYSTEMS; TIME RESOLUTION; TIMING CIRCUITS
- Descriptors DEC
- ELECTRONIC CIRCUITS; ELECTRONIC EQUIPMENT; EQUIPMENT; MEASURING INSTRUMENTS; PHYSICS; RESOLUTION; SPECTROMETERS; TIMING PROPERTIES
Optional Information
- Secondary number(s)
- CONF-931051--.