FPGA based programmable delay circuit for synchronization studies in the dc-glow discharge plasma system

Fed-back mechanism is used for doing Synchronization studies in single glow discharge plasma system for either suppressing or enhancing the oscillations of the system. A delay varying from less than a quarter period to almost one period of the incoming oscillations is required to be fed-back to the system which generates a time-varying signal with controlled frequency and amplitude. The oscillations obtained from the system has the lower frequency signal in the range of 100KHz and varying upto MHz range in the upper frequency range. A programmable delay circuit controlled through front panel GUI based on NI LabVIEW is designed and implemented using FPGAs and other high sampling rate digital integrated circuits. As the signal range is in the range of 100KHz and above, high sampling-rate ADC, DAC are being deployed in the circuit. Delay is introduced using FIFO implemented in the FPGA as an IP-core. Front -end is implemented using programmable-high bandwidth instrumentation amplifiers and OPAMP. The output of the DAC is followed by 4-order sallen key filter implemented using high bandwidth dual OPAMP AD823. The system is successfully tested with the experimental-setup with noticeable effect on the system. (author)