Published February 7, 1984 | Version v1
Patent

High efficiency inverter and ballast circuits

Creators

Description

A high efficiency push-pull inverter circuit employing a pair of relatively high power switching transistors is described. The switching on and off of the transistors is precisely controlled to minimize power losses due to common-mode conduction or due to transient conditions that occur in the process of turning a transistor on or off. Two current feed-back transformers are employed in the transistor base drives; one being saturable for providing a positive feedback, and the other being non-saturable for providing a subtractive feedback

Availability note (English)

U.S. Commissioner of Patents, Washington, D.C. 20231, USA, $.50.

Additional details

Publishing Information

Imprint Pagination
v p.
IPC:
Int. Cl. H03K 3/282; H03K 3/30.
IPC
Int. Cl. H03K 3/282; H03K 3/30.
Patent number
US patent document 4,430,628/A/

INIS

Country of Publication
United States
Country of Input or Organization
United States
INIS RN
16010645
Subject category
S42: ENGINEERING;
Resource subtype / Literary indicator
Non-conventional Literature
Descriptors DEI
FEEDBACK; INVERTERS; OPTIMIZATION; SPECIFICATIONS; TRANSFORMERS; TRANSIENTS; TRANSISTOR SWITCHING CIRCUITS
Descriptors DEC
ELECTRICAL EQUIPMENT; ELECTRONIC CIRCUITS; EQUIPMENT; SWITCHING CIRCUITS

Optional Information

Notes
PAT-APPL-330159.