Published May 15, 2014
| Version v1
Journal article
A single-electron tunneling reset-set flip-flop
- 1. Department of Electrical Engineering, University of Brasilia, Campus Universitário Darcy Ribeiro, Asa Norte, P.O. Box 4386, Brasilia-DF, 70919-970 (Brazil)
Description
In this paper, a new Reset-Set flip-flop fully implemented with single-electron devices is proposed. Its topology derived from NAND gates and was validated at room temperature by simulation. Furthermore, a comparison between the proposed single-electron device and MOS devices in terms of power consumption and occupied area is presented
Additional details
Identifiers
- DOI
- 10.1063/1.4878311;
Publishing Information
- Journal Title
- AIP Conference Proceedings
- Journal Volume
- 1598
- Journal Issue
- 1
- Journal Page Range
- p. 214-217
- ISSN
- 0094-243X
- CODEN
- APCPCS
Conference
- Title
- 7. international conference on low dimensional structures and devices
- Acronym
- LDSD 2011
- Dates
- 22-27 May 2011
- Place
- Telchac (Mexico)
INIS
- Country of Publication
- United States
- Country of Input or Organization
- International Atomic Energy Agency (IAEA)
- INIS RN
- 45101663
- Subject category
- S77: NANOSCIENCE AND NANOTECHNOLOGY;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- COMPARATIVE EVALUATIONS; COMPUTERIZED SIMULATION; ELECTRONS; GATING CIRCUITS; LOGIC CIRCUITS; NANOSTRUCTURES; SILICON OXIDES; TEMPERATURE RANGE 0273-0400 K; TOPOLOGY; TUNNEL EFFECT
- Descriptors DEC
- CHALCOGENIDES; ELECTRONIC CIRCUITS; ELEMENTARY PARTICLES; EVALUATION; FERMIONS; LEPTONS; MATHEMATICS; OXIDES; OXYGEN COMPOUNDS; SILICON COMPOUNDS; SIMULATION; TEMPERATURE RANGE
Optional Information
- Notes
- (c) 2014 AIP Publishing LLC