Published May 1, 2019 | Version v1
Journal article

Improvement of Performance of HfS2 Transistors Using a Self-Assembled Monolayer as Gate Dielectric

Creators

  • 1. Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Meguro, Tokyo 152-8552 (Japan)

Description

This work details a study based on HfS2 transistors utilizing an n-octadecylphosphonic acid-based self-assembled monolayer (SAM) as the gate dielectric. The fabrication of the SAM-based two-dimensional (2D) material transistor is simple and can be used to improve the quality of the interface of air-sensitive 2D materials. In comparison to HfS2 transistors utilizing a conventional Al2O3 gate insulator by atomic layer deposition, HfS2 transistors utilizing an SAM as the gate dielectric can reduce the operation region from 4V to 2V, enhance the field-effect mobility from 0.03 cm2/Vs to 0.75 cm2/Vs, improve the sub-threshold swing from 404 mV/dec to 156 mV/dec, and optimize the hysteresis to 0.03 V, thus demonstrating improved quality of the semiconductor/insulator interface. (paper)

Availability note (English)

Available from http://dx.doi.org/10.1088/0256-307X/36/6/067301

Additional details

Publishing Information

Journal Title
Chinese Physics Letters
Journal Volume
36
Journal Issue
6
Journal Page Range
[4 p.]
ISSN
0256-307X
CODEN
CPLEEU