Published August 2011 | Version v1
Journal article

Two different LNA optimizing techniques

  • 1. Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 (China)

Description

Two different LNA design techniques, namely the classical two-port technique and the Shaeffer technique, have been introduced, compared and implemented for practical design. Their merits and drawbacks are also discussed. This paper mainly focuses on the former technique, which is seldom introduced in traditional papers. Since a parasitic capacitor of the transistor is included in the computation of the former technique, the errors caused by the ignorance of the capacitor have been minimized, which is superior to traditional techniques. Using the former technique, a fully integrated LNA is realized with only 1.4 dB while drawing 1.3 mA DC at 2.4 GHz for simulation results. Another version of the LNA is designed using the latter technique, which has been fabricated.

Availability note (English)

Available from http://dx.doi.org/10.1088/1674-4926/32/8/085014

Additional details

Publishing Information

Journal Title
Journal of Semiconductors
Journal Volume
32
Journal Issue
8
Journal Page Range
[9 p.]
ISSN
1674-4926

INIS

Country of Publication
United Kingdom
Country of Input or Organization
International Atomic Energy Agency (IAEA)
INIS RN
43015289
Subject category
S36: MATERIALS SCIENCE;
Descriptors DEI
CALCULATION METHODS; CAPACITORS; DESIGN; OPTIMIZATION; SIMULATION; TRANSISTORS
Descriptors DEC
ELECTRICAL EQUIPMENT; EQUIPMENT; SEMICONDUCTOR DEVICES