Published February 1985
| Version v1
Journal article
Microstore: The Stanford Analog Memory Unit
Description
An NMOS device has been developed which provides high speed analog signal storage and readout for time expansion of transient signals. This device takes advantage of HMOS-1 VLSI technology to implement an array of 256 storage cells. Sequential samples of an input waveform can be taken every 5 ns while providing an effective sampling aperture time of less than 1 ns. The design signal-to-noise ratio is 1 part in 2000. Digital control circuitry is provided on the chip for controlling the read-in and read-out processes. A reference circuit is incorporated in the chip for first order compensation of leakage drifts, sampling pedestals, and temperature effects
Additional details
Publishing Information
- Journal Title
- IEEE Trans. Nucl. Sci.
- Journal Volume
- NS-32
- Journal Issue
- 1
- Series
- IEEE Trans. Nucl. Sci.
- Journal Page Range
- 616-620
- ISSN
- 0018-9499
- CODEN
- IETNA
Conference
- Title
- Nuclear science symposium.
- Dates
- 31 Oct - 2 Nov 1984.
- Place
- Orlando, FL (USA).
INIS
- Country of Publication
- United States
- Country of Input or Organization
- United States
- INIS RN
- 17036968
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY; S42: ENGINEERING;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- ANALOG SYSTEMS; DRIFT CHAMBERS; INTEGRATED CIRCUITS; MEMORY DEVICES; NOISE; PERFORMANCE; POSITION SENSITIVE DETECTORS; READOUT SYSTEMS; SPECIFICATIONS; STANFORD LINEAR ACCELERATOR CE
- Descriptors DEC
- ELECTRONIC CIRCUITS; MEASURING INSTRUMENTS; MULTIWIRE PROPORTIONAL CHAMBER; NATIONAL ORGANIZATIONS; PROPORTIONAL COUNTERS; RADIATION DETECTORS; US DOE; US ERDA; US ORGANIZATIONS
Optional Information
- Secondary number(s)
- CONF-841007--.