Characteristics enhancement of a GaAs based heterostructure field-effect transistor with an electrophoretic deposition (EPD) surface treated gate structure

Highlights: • Platinum (Pt) was formed on the gate region of a heterostructure field-effect transistor (HFET) by an electrophoretic deposition (EPD) approach. • EPD-based Pt morphologies were examined by SEM, AFM, XRD, and EDS analyses. • EPD approach shows advantages of low cost, simple apparatus, and adjustable alloy grain size. • EPD-based Pt-gate structure contributes to device's superior temperature-dependent I–V characteristics. - Abstract: A Pt/AlGaAs/InGaAs/GaAs heterostructure field-effect transistor (HFET), prepared by an electrophoretic deposition (EPD) approach on gate Schottky contact region, is fabricated and studied. The EPD-based Pt-gates with three different molar ratios (ω₀) are examined by scanning electron microscopy (SEM) image. Good Pt-gate coverage with effective reduction of thermal-induced defects at Pt/AlGaAs interface is achieved through a low temperature EPD approach. Experimentally, for a gate dimension of 1 μm × 100 μm, a lower gate current of 1.9 × 10⁻² mA/mm, a higher turn-on voltage of 0.85 V, a higher maximum drain saturation current of 319.3 mA/mm, and a higher maximum extrinsic transconductance of 146.8 mS/mm are obtained for an EPD-based HFET at 300 K. Moreover, comparable microwave characteristics of an EPD-based HFET are demonstrated at different temperature ambiences. Therefore, based on the improved DC performance and inherent benefits of low cost, simple apparatus, flexible deposition on varied substrates, and adjustable alloy grain size, the proposed EPD approach shows the promise to fabricate high-performance electronic devices