Published July 2018 | Version v1
Journal article

Influence of atomic layer deposition temperature on the electrical properties of Al/ZrO2/SiO2/4H-SiC metal-oxide semiconductor structures

  • 1. Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland)
  • 2. Institute of Physics, Polish Academy of Sciences, Warsaw (Poland)

Description

In this paper a ZrO2/SiO2/4H-SiC dielectric system for potential application as gate dielectric for SiC MOSFETs is investigated. An enhanced breakdown performance for this type of dielectric stacks having typical value of critical field of 17 MV cm-1 and reaching a maximum value of 20 MV cm-1 is presented. The observed results are explained based on high-k layer properties in conjunction with a reduced impact ionization effect in SiO2 layer. Electrical and structural properties of this dielectric stack are measured and analyzed. Growth temperature of atomic layer deposition process seems to be a crucial parameter that influences on layer microstructure and electrical properties such as permittivity of high-κ layer and critical electric field for all dielectric stacks. (copyright 2018 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Availability note (English)

Available from: http://dx.doi.org/10.1002/pssa.201700882

Additional details

Identifiers

Publishing Information

Journal Title
Physica Status Solidi A. Applications and Materials Science (Online)
Journal Volume
215
Journal Issue
13
Journal Page Range
p. 1-7
ISSN
1862-6319

Optional Information

Notes
With 11 figs., 1 tab.