BE-SONOS flash memory along with metal gate and high-k dielectrics in tunnel barrier and its impact on charge retention dynamics

We investigate the effect of a high-k dielectric in the tunnel layer to improve the erase speed-retention trade-off. Here, the proposed stack in the tunnel layer is AlLaO₃/HfAlO/SiO₂. These proposed materials possess low valence band offset with high permittivity to improve both the erase speed and retention time in barrier engineered silicon-oxide-nitride-oxide-silicon (BE-SONOS). In the proposed structure HfAlO and AlLaO₃ replace Si₃N₄ and the top SiO₂ layer in a conventional oxide/nitride/oxide (ONO) tunnel stack. Due to the lower conduction band offset (CBO) and high permittivity of the proposed material in the tunnel layer, it offers better program/erase (P/E) speed and retention time. In this work the gate length is also scaled down from 220 to 55 nm to observe the effect of high-k materials while scaling, for the same equivalent oxide thickness (EOT). We found that the scaling down of the gate length has a negligible impact on the memory window of the devices. Hence, various investigated tunnel oxide stacks possess a good memory window with a charge retained up to 87.4% (at room temperature) after a period of ten years. We also examine the use of a metal gate instead of a polysilicon gate, which shows improved P/E speed and retention time. (paper)