Design and Architecture of SST-1 basic plasma control system

Highlights: • Reflective Memory network. • FPAG based Timing system for trigger distribution. • IRIG-B network for GPS time synchronization. • PMC based Digital Signal Processors and VME. • Simultaneous sampling ADC. - Abstract: Primary objective of SST-1 Plasma control system is to achieve Plasma position, shape and current profile control. Architecture of control system for SST-1 is distributed in nature. Fastest control loop time requirement of 100 μs is achieved using VME based simultaneous sampling ADCs, PMC based quad core DSP, Reflective Memory [RFM] based real-time network, VME based real-time trigger distribution network and Ethernet network. All the control loops for shape control, position control and current profile control share common signals from Magnetic diagnostic so it is planned to accommodate all the algorithms on the same PMC based quad core DSP module TS C-43. RFM based real-time data network replicate data from one node to next node in a ring network topology at sustained throughput rate of 13.4 MBps. Real-time Timing System network provides guaranteed trigger distribution in 3.8 μs from one node to all node of the network. Monitoring and configuration of different systems participating in the operation of SST-1 is done by Ethernet network. Magnetic sensors data is acquired using Pentek 6802 simultaneously sampling ADC card at the rate of 10KSPS. All the real-time raw data along with the control data will be archived using RFM network and SCSI HDD for the experiment duration of 1000 s. RFM network is also planned for real-time plotting of key parameter of Plasma during long experiment. After experiment this data is transferred to central storage server for archival purpose. This paper discusses the architecture and hardware implementation of the control system by describing all the involved hardware and software along with future plans for up-gradations.