Published July 4, 1979 | Version v1
Patent Open

Narrow channel MOS devices and method of manufacturing

Description

High performance MOS transistors are provided by a method that includes providing an oxygen-impermeable mask on a selected region of a semiconductor substrate, oxidising the unmasked portion of the surface to provide a thick oxide layer at least partially recessed in the substrate. This layer includes a smoothly tapered beak that extends between the margin of the mask and the underlying silicon surface, and, after removing the mask, implanting a selected impurity in the substrate beneath the selected region to form a thin impurity layer that terminates at a sloped portion of the substrate formed by the oxidation step. (U.K.)

Availability note (English)

MF available from INIS under the Report Number.

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Additional details

Publishing Information

Imprint Pagination
10 p.
IPC:
Int. Cl. H01l21/265; H01l29/78.
IPC
Int. Cl. H01l21/265; H01l29/78.
Patent number
GB patent document 2011170/A/