Failure mechanisms and assembly-process-based solution of FCBGA high lead C4 bump non-wetting

This paper studies the typical failure modes and failure mechanisms of non-wetting in an FCBGA (flip chip ball grid array) assembly. We have identified that the residual lead and tin oxide layer on the surface of the die bumps as the primary contributor to non-wetting between die bumps and substrate bumps during the chip-attach reflow process. Experiments with bump reflow parameters revealed that an optimized reflow dwell time and H2 flow rate in the reflow oven can significantly reduce the amount of lead and tin oxides on the surface of the die bumps, thereby reducing the non-wetting failure rate by about 90%. Both failure analysis results and mass production data validate the non-wetting failure mechanisms identified by this study. As a result of the reflow process optimization, the failure rate associated with non-wetting is significantly reduced, which further saves manufacturing cost and increases capacity utilization. (semiconductor technology)