The design of a low-dropout voltage regulator used in the front-end electronics nuclear detect

[Background] As nuclear detectors become more and more channels with smaller and smaller volume, front-end electronics tends to adopt CMOS (complementary metal oxide semiconductor) ASIC designs. The ASIC has low power consumption, small parasitic capacitance and small size, hence the power supply has a tendency to integrate at the front end. [Purpose] This study aims to design a new kind of low-dropout (LDO) structure that is suitable for the front-end power supply of nuclear detectors and robust to the process and has no capacitance. [Methods] Based on the classical low-dropout (LDO) structure, complementary metal oxide semiconductor (CMOS) process using IBM 130 nm process was employed to realize the new LDO structure. A novel LDO robust to external capacitance value and equivalent series resistance (ESR) was obtained. This comprehensive performance of the design has the advantage of strong robustness to load capacitance, hence is suitable for the front end of the nuclear detector. [Results] Its recovery time of the transient response is less than 400 ns and the drop out voltage is below 200 mV. All these futures are especially suitable for the front end, which is often a hybrid circuit. [Conclusion] This design is used for the cylindrical gas electron multipliers (CGEM) of BESIII update project, it is also the technical reserve for the power supply of third generation pixel detector in large hadron collider (LHC). (authors)