Light-bias coupling erase process for non-volatile zinc tin oxide TFT memory with a nickel nanocrystals charge trap layer

A nonvolatile charge trapping memory is demonstrated on a thin film transistor (TFT) using a solution processed ultra-thin (∼7 nm) zinc tin oxide (ZTO) semiconductor layer with an Al₂O₃/Ni-nanocrystals (NCs)/SiO₂ dielectric stack. A positive threshold voltage (V _TH) shift of 7 V is achieved at gate programming voltage of 40 V for 1 s but the state will not be erased by applying negative gate voltage. However, the programmed V _TH shift can be expediently erased by applying a gate voltage of  −10 V in conjunction with visible light illumination for 1 s. It is found that the sub-threshold swing (SS) deteriorates slightly under light illumination, indicating that photo-ionized oxygen vacancies ($V_{\text{o}}^{+}$ and/or $V_{\text{o}}^{++}$) are trapped at the interface between Al₂O₃ and ZTO, which assists the capture of electrons discharged from the Ni NCs charge trapping layer. The light-bias coupling action and the role of ultra-thin ZTO thickness are discussed to elucidate the efficient erasing mechanism. (paper)