TRB3: a 264 channel high precision TDC platform and its applications

The TRB3 features four FPGA-based TDCs with < 20 ps RMS time precision between two channels and 256+4+4 channels in total. One central FPGA provides flexible trigger functionality and GbE connectivity including powerful slow control. We present recent users' applications of this platform following the COME and KISS principle: successful test beamtimes at CERN (CBM), in Jülich and Mainz with an FPGA-based discriminator board (PaDiWa), a charge-to-width FEE board with high dynamic range, read-out of the n-XYTER ASIC and software for data unpacking and TDC calibration in ROOT. We conclude with an outlook on future developments