Published 1976 | Version v1
Journal article

Short channel, low noise UHF MOS-FET's utilizing molybdenum-gate masked ion-implantation

  • 1. Hitachi Ltd., Kokubunji, Tokyo (Japan). Central Research Lab.

Description

A low noise high cutoff frequency dual-gate MOS-FET with a Mo-gate is fabricated using gate-masked ion-implantation. In the high frequency region, low noise performance is achieved with a short channel and minimum resistive parasitics such as gate and source resistances. To reduce the effect of the gate resistance, a new comb type structure with low resistive Mo film is realized. The dual-gate FET with a channel length of 1.3 μ as the 1st channel and 2.5 μ as the 2nd channel, a channel width of 1.2 mm and a gate oxide thickness of 600 A, was operated at 800 MHz with a minimum noise figure of 2.4 dB and a power gain of 19 dB. Good cross modulation characteristic was also confirmed. (auth.)

Additional details

Identifiers

Publishing Information

Journal Title
Japanese Journal of Applied Physics
Journal Volume
15
Journal Issue
S1
Series
Jpn. J. Appl. Phys.
Journal Page Range
201
ISSN
0021-4922

Conference

Title
7. conference on solid state devices.
Dates
1 Sep 1975.
Place
Tokyo, Japan.

INIS

Country of Publication
Japan
Country of Input or Organization
Japan
INIS RN
8311580
Subject category
S75: CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY;
Resource subtype / Literary indicator
Conference
Descriptors DEI
FILMS; GAIN; ION IMPLANTATION; MHZ RANGE 100-1000; MODULATION; MOLYBDENUM; MOSFET; NOISE; PERFORMANCE
Descriptors DEC
ELEMENTS; FREQUENCY RANGE; METALS; MHZ RANGE; MOS TRANSISTORS; SEMICONDUCTOR DEVICES; TRANSISTORS; TRANSITION ELEMENTS

Optional Information

Notes
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