Published June 2009 | Version v1
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Two CMOS BGR using CM and DTMOST techniques

  • 1. Faculty of Engineering, Multimedia University, 63100 Cyberjaya, Selangor (Malaysia)
  • 2. Abdus Salam International Centre for Theoretical Physics, Trieste (Italy)
  • 3. Department of Electrical, Electronic and Systems Engineering, Universiti Kebangsaan Malaysia, 43600 UKM, Bangi, Selangor (Malaysia)

Description

Two CMOS BGR using current mode (0.044mm2) and Dynamic Threshold MOST (0.017mm2) techniques are designed on CMOS 0.18μm process. On-wafer measurement shows both circuits have minimum operating VDD 1.28V at 25oC; taking 2.1μA and 0.5μA (maximum current 3.1μA and 1.1μA) and output voltage of 514mV and 457mV. Both circuits could support VDD range up to 4V required by passive UHF RFID. (author)

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Additional details

Publishing Information

Imprint Pagination
9 p.
Report number
IC--2009/042

INIS

Country of Publication
International Atomic Energy Agency (IAEA)
Country of Input or Organization
International Atomic Energy Agency (IAEA)
INIS RN
42067601
Subject category
S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
Descriptors DEI
ELECTRIC POTENTIAL; MEASURING METHODS; MOS TRANSISTORS; OXIDES; SILICON
Descriptors DEC
CHALCOGENIDES; ELEMENTS; OXYGEN COMPOUNDS; SEMICONDUCTOR DEVICES; SEMIMETALS; TRANSISTORS

Optional Information

Notes
4 refs, 6 figs, 1 tab