Published July 14, 2008 | Version v1
Journal article

Room temperature Si δ-growth on Ge incorporating high-K dielectric for metal oxide semiconductor applications

  • 1. Department of Electrical Engineering, University of California Los Angeles, Los Angeles, California 90095 (United States)
  • 2. School of Engineering and Centre for Microscopy and Microanalysis, The University of Queensland, Brisbane, St Lucia, Queensland 4072 (Australia)
  • 3. Department of Materials Science and Engineering, University of California Los Angeles, Los Angeles, California 90095 (United States)

Description

A low temperature Al2O3/4 monolayer amorphous Si gate stack process was demonstrated on p-type Ge wafers using atomic layer deposition and molecular beam epitaxy. Multifrequency capacitance-voltage (C-V) and current-voltage (I-V) characteristics showed excellent electrical properties of the Pt/Al2O3/4 ML Si/Ge metal oxide semiconductor capacitor. No kinks from 1 MHz to 4 kHz and a leakage current density of 2.6x10-6 A/cm2 at 1 V with an equivalent oxide thickness of 2.5 nm. The interface characterization using a conductance method showed that interface trap density at the near midgap was 8x1012 eV-1 cm-2 and a mean capture cross section of holes was extracted to be 10-16 cm2

Additional details

Identifiers

Publishing Information

Journal Title
Applied Physics Letters
Journal Volume
93
Journal Issue
2
Journal Page Range
p. 023501-023501.3
ISSN
0003-6951
CODEN
APPLAB

Optional Information

Notes
(c) 2008 American Institute of Physics