Published February 12, 1985 | Version v1
Patent

Method of manufacturing Josephson junction integrated circuits

Description

Josephson junction integrated circuits of the current injection type and magnetically controlled type utilize a superconductive layer that forms both Josephson junction electrode for the Josephson junction devices on the integrated circuit as well as a ground plane for the integrated circuit. Large area Josephson junctions are utilized for effecting contact to lower superconductive layers and islands are formed in superconductive layers to provide isolation between the groudplane function and the Josephson junction electrode function as well as to effect crossovers. A superconductor-barrier-superconductor trilayer patterned by local anodization is also utilized with additional layers formed thereover. Methods of manufacturing the embodiments of the invention are disclosed

Availability note (English)

U.S. Commissioner of Patents, Washington, D.C. 20231, USA, $.50.

Additional details

Publishing Information

Imprint Pagination
v p.
IPC:
Int. Cl. H01L 21/479; H01L 21/48.
IPC
Int. Cl. H01L 21/479; H01L 21/48.
Patent number
US patent document 4,498,228/A/

INIS

Country of Publication
United States
Country of Input or Organization
United States
INIS RN
17018268
Subject category
S71: CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS;
Resource subtype / Literary indicator
Non-conventional Literature
Descriptors DEI
ELECTRODES; FABRICATION; INTEGRATED CIRCUITS; JOSEPHSON JUNCTIONS; SUPERCONDUCTORS
Descriptors DEC
ELECTRONIC CIRCUITS; SEMICONDUCTOR JUNCTIONS

Optional Information

Notes
PAT-APPL-550847.