Published October 2019 | Version v1
Journal article

Energy-aware cache hierarchy assessment targeting HEVC encoder execution

  • 1. Federal University of Rio Grande do Sul, UFRGS, Informatics Institute, PPGC (Brazil)
  • 2. Federal University of Pelotas, UFPel, Group of Architectures and Integrated Circuits—GACI (Brazil)

Description

This article presents a framework for assessing the behavior and energy impact of cache hierarchies when encoding HEVC on general-purpose processors. The memory energy estimation framework estimates energy consumption of cache hierarchies based on mathematical models combined with memory access profiling tools. The energy analysis of several cache hierarchies targeting HEVC encoders with different input parameters is also carried out. This article provides relevant information on the energy consumption of HEVC encoders by taking into account the different tradeoffs between energy efficiency, coding efficiency, and other important cache memory design parameters, such as miss rates and access latency. The first analysis explores cache performance for different specifications, such as capacity, line size. Results show that most of the energy is spent on reading operations (almost 73% on the first level cache), indicating that HEVC encoders could benefit from memory technologies with low reading energy costs. This analysis also pointed that increasing the capacity affects more the energy performance of the first level cache, which represents 34.78% (on average) more energy consumption than the last level cache. Based on this investigation, we report the most suited cache specifications for HEVC encoders for each video resolution. The second analysis discusses the impact of HEVC input parameters in cache performance, demonstrating that it is possible to save up to 30% of energy with a small increase of 2% in BD-BR. A comparative analysis between HM (HEVC model) and x265 (H.265 video codec) HEVC software models is presented, demonstrating that x265 is faster (speedup to 648x), and more cache efficient providing less memory energy (31.38% on average) compared to the HM implementation. The results obtained with the proposed framework indicate that the management of video encoding parameters combined with application-tuned cache specifications has a high potential to reduce energy consumption of video coding systems while keeping video quality.

Additional details

Identifiers

Publishing Information

Journal Title
Journal of Real-Time Image Processing (Internet)
Journal Volume
16
Journal Issue
5
Journal Page Range
p. 1695-1715
ISSN
1861-8219

INIS

Country of Publication
Germany
Country of Input or Organization
International Atomic Energy Agency (IAEA)
INIS RN
54110904
Subject category
S97: MATHEMATICAL METHODS AND COMPUTING;
Descriptors DEI
COMPUTER CODES; ENERGY CONSUMPTION; ENERGY EFFICIENCY; MATHEMATICAL MODELS
Descriptors DEC
EFFICIENCY

Optional Information

Copyright
Copyright (c) 2017 Springer-Verlag Berlin Heidelberg