Device performance of shallow junction PMOSFETs fabricated using low-energy ion implantation of B and BF2 into crystalline and Ge preamorphised silicon

P-channel MOSFETs with source/drain junction depths less than 0.1μm were fabricated using 1.35 keV B+ and 6 keV BF2+ implantation into crystalline and Ge preamorphised silicon. For 950-10500C, 10s rapid thermal annealing, the various implantation conditions yielded similar device characteristics. The implantation of BF2+ resulted in a slight increase in the specific contact resistivity to source and drain over that obtained using B+. Measurements of subthreshold I/V characteristics and the channel length dependence of threshold voltage indicated that good long-channel behaviour was obtained for 0.7 μm channel length devices. (author)