Published February 2010
| Version v1
Journal article
A 'mesh' seed layer for improved through-silicon-via fabrication
Creators
- 1. Nanoelectronics Research Center, Georgia Institute of Technology 791 Atlantic Drive, NW, Atlanta, GA 30332-0269 (United States)
Description
This paper describes an improved method of forming and removing seed layers for through-silicon-vias (TSVs) in applications such as MEMS, sensors and packaging (silicon carrier, for example). A 'mesh seed layer' is proposed to reduce the pinch-off time and facilitate simpler and mechanical-free removal, the latter being possibly important when sensitive MEMS/sensor devices are pre-fabricated on the wafer. As a result, the proposed process may serve as a post-MEMS/sensor method of forming TSVs.
Availability note (English)
Available from http://dx.doi.org/10.1088/0960-1317/20/2/025016Additional details
Identifiers
- DOI
- 10.1088/0960-1317/20/2/025016;
- PII
- S0960-1317(10)26739-6;
Publishing Information
- Journal Title
- Journal of Micromechanics and Microengineering. Structures, Devices and Systems
- Journal Volume
- 20
- Journal Issue
- 2
- Journal Page Range
- [6 p.]
- ISSN
- 0960-1317
- CODEN
- JMMIEZ
INIS
- Country of Publication
- United Kingdom
- Country of Input or Organization
- International Atomic Energy Agency (IAEA)
- INIS RN
- 46021772
- Subject category
- S75: CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY;
- Descriptors DEI
- CARRIERS; EQUIPMENT; FABRICATION; LAYERS; MEMS; PACKAGING; SENSORS; SILICON
- Descriptors DEC
- ELEMENTS; SEMIMETALS