Published 1986
| Version v1
Book
A novel silicided shallow junction technology for CMOS VLSI
- 1. Microelectronics Research Center, Dept. of Electrical and Computer Engineering, Univ. of Texas at Austin, Austin, TX (USA)
Description
A novel technique for the fabrication of shallow, silicided p/sup +/-n junctions with excellent electrical characteristics has been developed. The technique utilizes the ion implantation of dopants into silicide layers formed by ion-beam mixing with Si ions and low temperature annealing, and the subsequent drive-in of implanted dopants into the Si substrates to form shallow junctions. This technique can be easily applied to the fabrication of MOSFETs in a self-aligned fashion, and can have a significant impact on CMOS VLSI technology
Additional details
Publishing Information
- Publisher
- Materials Research Society.
- Imprint Place
- Pittsburgh, PA (USA)
- ISBN
- 0-931837-37-5
- Imprint Title
- Materials issues in silicon integrated circuit processing
- Journal Page Range
- p. 379-386.
Conference
- Title
- Materials Research Society spring meeting.
- Dates
- 15-18 Apr 1986.
- Place
- Palo Alto, CA (USA).
INIS
- Country of Publication
- United States
- Country of Input or Organization
- United States
- INIS RN
- 20000677
- Subject category
- S75: CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; S36: MATERIALS SCIENCE; S37: INORGANIC, ORGANIC, PHYSICAL AND ANALYTICAL CHEMISTRY;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- ANNEALING; DOPED MATERIALS; ELECTRICAL PROPERTIES; FABRICATION; FEASIBILITY STUDIES; ION IMPLANTATION; JUNCTION TRANSISTORS; LOW TEMPERATURE; MATERIALS TESTING; MOS TRANSISTORS; MOSFET; SILICON ALLOYS
- Descriptors DEC
- ALLOYS; FIELD EFFECT TRANSISTORS; HEAT TREATMENTS; MATERIALS; PHYSICAL PROPERTIES; SEMICONDUCTOR DEVICES; TESTING; TRANSISTORS