Characterization of ultrathin FDSOI stacks using low-field mobility

Herein, a method for the electrical characterization of a fully depleted silicon-on-insulator (FDSOI) high-k dielectric-metal-gate stack is proposed. The method is based on assessing low-field mobility in FDSOI field-effect transistor (FET) from current-voltage measurements at various temperatures in the gate voltage range up to strong inversion. In addition to assessing the value of the low-field mobility for the stack itself, it allows specifying the impact of various carrier-scattering mechanisms on the total stack mobility. Further, the application of double-gate operation in the optimal coupling mode for the FET allows analysis of the impact of the gate interfaces on mobility. The method can be used in the monitoring of stack quality and in the design and development of stack fabrication processes. (© 2022 The Authors. physica status solidi (a) applications and materials science published by Wiley‐VCH GmbH)