Published December 2010 | Version v1
Journal article

Design and simulation of track/hold circuit with CMOS FET for particle detector

  • 1. Department of Physics, University of Douala, Douala (Cameroon)
  • 2. Institute of Modern Physics, Chinese Academy of Sciences, Lanzhou (China)

Description

In this paper, the objective is to realize a Track/Hold Circuit for silicon strip, Si(Li), CdZnTe and CsI detectors etc. By using CMOS transistor to implement various components in electronic circuit, the Track and Hold circuit only made with CMOS FET is succeeded to be designed and simulated. Performance was characterized using PSPICE simulator with BSIMV3.3 parameters of the Proteus. Several measurements of acquisition time can be made from 60 ns to 4.44 μs related to the output resistance, and the integral nonlinearity is good. (authors)

Additional details

Publishing Information

Journal Title
Nuclear Physics Review
Journal Volume
27
Journal Issue
4
Journal Page Range
p. 459-463
ISSN
1007-4627

Optional Information

Notes
7 figs., 2 tabs., 6 refs.