Published 1987 | Version v1
Book

Status of the Columbia lattice parallel processor project

Creators

  • 1. Dept. of Physics, Columbia Univ., New York, NY 10027

Description

The author reviews the status of the Columbia Lattice Parallel Processor project, in which parallel processing hardware with high performance floating point capability is used to perform large scale Monte Carlo studies of QCD. The project encompasses three stages; a 16-node machine with a nominal peak speed of 256 Mflops, a 1 Gflop 64-node machine, and a 16 Gflop 256-node machine. The 16-node machine was completed in April 1985, and has been employed since that time for the study of deconfinement in the pure gauge theory. The 64-node machine is under construction. The prototype node was completed in June 1986 and has successfully run a Monte Carlo program. Completion is expected by the end of 1986. The 256-node machine is now in the design stage. The modularity of the design makes evolutionary improvement of the vector processor relatively painless. This modularity together with the latest generation of floating point chips makes possible a very exciting aspect of the 256-node design, namely, a single node peak speed of 64 Mflops

Additional details

Publishing Information

Publisher
SPIE Society of Photo-Optical Instrumentation Engineers.
Imprint Place
Bellingham, WA (USA)
ISBN
9971-50-183-X
Imprint Title
Proceedings of the XXIII international conference on high energy physics
Journal Page Range
p. 566-569.

Conference

Title
23. international conference on high-energy physics.
Dates
16-23 Jul 1986.
Place
Berkeley, CA (USA).