SymPLe 1131: A novel architectural solution for the realization of verifiable digital I and C systems and embedded digital devices - 387

One of the main reasons for the increasing popularity of FPGAs in embedded systems and digital I and C systems is that they provide many of the advantages from both hardware and software components. FPGAs provide configurability approaching that of SW, while at the same time delivering deterministic behavior of pure hardware solutions. However, with regard to Software Common Cause Failures (CCF), the use of FPGAs in digital I and C platforms should not be seen as plug-in remedy for reduction or elimination of CCF. To address CCF, we argue that it is not enough to manage the complexity of an I and C device or system, but we must also have the ability to constrain complexity (as needed) and rigorously reason about execution and device functionality. This paper presents the work done regarding an FPGA overlay architecture called SymPLe. SymPLe is designed to reduce the gap between software and hardware approaches for digital I and C systems and increases deterministic behavior and verifiability of the application, architecture and safety-critical system while reasoning about CCF. (authors)