Simulation of charging phenomena in ion implantation into the micro structure pattern
Creators
- 1. Nisshin Electric Co. Ltd., Kyoto (Japan)
Description
The charging of devices in high current ion implantation has become a serious problem. We have suggested that the negative ion has an effect on this problem. We have calculated the charging-up potential of insulated region considering the micro device structure, and compared the positive and negative ion implantation. We have reached the following results: the larger the grounded area and the bigger the secondary electron emission factor of grounded region, the surface potential of insulated region is lower in both positive and negative ion implantation. Especially in negative ion implantation the saturated surface potential is getting near zero volt. In negative ion implantation to the micro structure pattern, the surface voltage saturates at a low voltage, which is suitable to the ion implantation into semiconductor devices. (author)
Additional details
Additional titles
- Original title (Japanese)
- Dai-4-kai ryushisen no sentanteki oyogijutsu ni kansuru shinpojiumu.
Publishing Information
- Publisher
- IONICS Publishing Corp.
- Imprint Place
- Tokyo (Japan)
- Imprint Title
- Proceedings of the fourth symposium on beam engineering of advanced material syntheses. Including bio-medical materials and treatments
- Imprint Pagination
- 230 p.
- Journal Page Range
- p. 83-86.
Conference
- Title
- 4. symposium on beam engineering of advanced material syntheses.
- Acronym
- BEAMS 1993
- Dates
- 24-26 Nov 1993.
- Place
- Tokyo (Japan).
INIS
- Country of Publication
- Japan
- Country of Input or Organization
- Japan
- INIS RN
- 26058462
- Subject category
- S75: CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY;
- Resource subtype / Literary indicator
- Conference
- Descriptors DEI
- CHARGES; ELECTRON EMISSION; ION IMPLANTATION; MICROSTRUCTURE; MOS TRANSISTORS; SECONDARY EMISSION; SIMULATION; SURFACE POTENTIAL
- Descriptors DEC
- CRYSTAL STRUCTURE; EMISSION; POTENTIALS; SEMICONDUCTOR DEVICES; TRANSISTORS
Optional Information
- Notes
- Imprint:Dai-4-kai ryushisen no sentanteki oyogijutsu ni kansuru shinpojiumu.