Gated mode operation of large DEPFET pixel modules for the Belle II Pixel Detector

DEPFET pixel detectors offer excellent signal to noise ratio, resolution and low power consumption with very little material budget. They will be used at Belle II and are a candidate for an ILC vertex detector. The modules were fully characterized and the operation voltages and control sequences of the ASICs were investigated and optimized. Due to the rolling shutter read-out the DEFET modules have integration times in the order of 20 μs, which can create problems in applications with temporary high background at SuperKEKB, e.g. during the top-up injection of bunches which will create large backgrounds every ten microseconds for about a few ms. In order to get rid of this background, we study a new operation mode, which allows a gated or shutter controlled operation of the detector. This operation mode makes the detector blind for short time interval of about 1 microsecond in which background is expected to pass the detector, whereas the charge of the previous signals will not be removed. Simulations and successful lab tests with large DEPFET matrices are presented.