Published March 2021 | Version v1
Journal article

GaN-on-silicon transistors with reduced current collapse and improved blocking voltage by means of local substrate removal

  • 1. Institut d'Electronique, de Microelectronique et de Nanotechnologie, Centre National de la Recherche Scientifique (IEMN-CNRS), Villeneuve d'Ascq (France)
  • 2. Department of Information Engineering, University of Padova, Padova (Italy)
  • 3. Enkris Semiconductor, Inc., Suzhou (China)

Description

We report on the demonstration of low trapping effects above 1200 V of GaN-on-silicon transistors using a local substrate removal (LSR) followed by a thick backside ultra-wide-bandgap AlN deposition. Substrate ramp measurements show reduced hysteresis up to 3000 V. It has been found that the LSR approach not only enables the extension operation voltage capabilities of GaN-on-silicon HEMTs with low on-resistance but also allow for the reduction of trapping effects directly affecting their dynamic behavior. This work points out that a large part of the electron trapping under high bias occurs at the AlN nucleation layer and Si substrate interface. (author)

Availability note (English)

Available from DOI: https://doi.org/10.35848/1882-0786/abdca0

Additional details

Identifiers

Publishing Information

Journal Title
Applied Physics Express (Online)
Journal Volume
14
Journal Issue
3
Journal Page Range
p. 036501.1-036501.5
ISSN
1882-0786

Optional Information

Notes
31 refs., 5 figs.