Published March 1, 2018 | Version v1
Journal article

Single-event burnout hardening of planar power MOSFET with partially widened trench source

  • 1. Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029 (China)

Description

We present a single-event burnout (SEB) hardened planar power MOSFET with partially widened trench sources by three-dimensional (3D) numerical simulation. The advantage of the proposed structure is that the work of the parasitic bipolar transistor inherited in the power MOSFET is suppressed effectively due to the elimination of the most sensitive region (P-well region below the N+ source). The simulation result shows that the proposed structure can enhance the SEB survivability significantly. The critical value of linear energy transfer (LET), which indicates the maximum deposited energy on the device without SEB behavior, increases from 0.06 to 0.7 pC/μm. The SEB threshold voltage increases to 120 V, which is 80% of the rated breakdown voltage. Meanwhile, the main parameter characteristics of the proposed structure remain similar with those of the conventional planar structure. Therefore, this structure offers a potential optimization path to planar power MOSFET with high SEB survivability for space and atmospheric applications. (paper)

Availability note (English)

Available from http://dx.doi.org/10.1088/1674-4926/39/3/034003

Additional details

Publishing Information

Journal Title
Journal of Semiconductors
Journal Volume
39
Journal Issue
3
Journal Page Range
[6 p.]
ISSN
1674-4926

INIS

Country of Publication
China
Country of Input or Organization
International Atomic Energy Agency (IAEA)
INIS RN
51064591
Subject category
S36: MATERIALS SCIENCE;
Descriptors DEI
COMPUTERIZED SIMULATION; ELECTRIC POTENTIAL; HARDENING; MOSFET; OPTIMIZATION; POTENTIALS; SPACE
Descriptors DEC
FIELD EFFECT TRANSISTORS; MOS TRANSISTORS; SEMICONDUCTOR DEVICES; SIMULATION; TRANSISTORS