FPGA-based online trigger algorithm development for HADES

Based on the ATCA compatible Compute Node (CN), investigation and development work has been conducted for the HADES online trigger algorithms on FPGAs. Specifically the inner MDC track reconstruction and the RICH ring recognition are respectively implemented into hardware processing engines, named Tracking Processing Unit (TPU) and Ring Recognition Unit (RRU). The TPU module searches for particle penetration points on a projection plane and reconstructs inner track segments from the target to those points; The RRU module identifies Cherenkov ring patterns generated by dilepton pairs, and correlates to the tracking result by receiving particle tracks which help to specify potential ring centers. Both modules will be integrated in the system design for online detector data processing. Implementation results reveal the feasibility to realize the complex algorithms on the FPGA. Preliminary tests have been done to estimate the system performance.