Published January 1999
| Version v1
Journal article
A bipolar adaptive biasing topology for low-power applications
Creators
- 1. L'Aquila Univ. (Italy). Dip Ingegneria Elettrica
Description
A new adaptive biasing topology has been developed to decrease the quiescent power dissipation in low-power applications without degradation of dynamic performance. The circuit topology is aimed to furnish an output current dependent on the input differential voltage, the minimum being when a common mode input voltage is applied. Spice simulations, demonstrating the validity of the shown technique, are reported
Additional details
Publishing Information
- Journal Title
- Alta Frequenza
- Journal Volume
- 11
- Journal Issue
- 1
- Journal Page Range
- p. 50-52
- ISSN
- 0002-6557
INIS
- Country of Publication
- Italy
- Country of Input or Organization
- Italy
- INIS RN
- 31000580
- Subject category
- S42: ENGINEERING;
- Descriptors DEI
- AMPLIFIERS; DISSIPATION FACTOR; ELECTRONIC CIRCUITS; PERFORMANCE; SENSITIVITY; TRANSISTORS
- Descriptors DEC
- ELECTRONIC EQUIPMENT; EQUIPMENT; SEMICONDUCTOR DEVICES