A high-speed DAQ framework for future high-level trigger and event building clusters
Creators
- 1. Institute for Data Processing and Electronics (IPE), Karlsruhe Institute of Technology (KIT), Hermann-von-Helmholtz-Platz 1, 76344 Eggenstein-Leopoldshafen (Germany)
Description
Modern data acquisition and trigger systems require a throughput of several GB/s and latencies of the order of microseconds. To satisfy such requirements, a heterogeneous readout system based on FPGA readout cards and GPU-based computing nodes coupled by InfiniBand has been developed. The incoming data from the back-end electronics is delivered directly into the internal memory of GPUs through a dedicated peer-to-peer PCIe communication. High performance DMA engines have been developed for direct communication between FPGAs and GPUs using 'DirectGMA (AMD)' and 'GPUDirect (NVIDIA)' technologies. The proposed infrastructure is a candidate for future generations of event building clusters, high-level trigger filter farms and low-level trigger system. In this paper the heterogeneous FPGA-GPU architecture will be presented and its performance be discussed.
Availability note (English)
Available from http://dx.doi.org/10.1088/1748-0221/12/03/C03015Additional details
Identifiers
Publishing Information
- Journal Title
- Journal of Instrumentation
- Journal Volume
- 12
- Journal Issue
- 03
- Journal Page Range
- p. C03015
- ISSN
- 1748-0221
INIS
- Country of Publication
- United Kingdom
- Country of Input or Organization
- International Atomic Energy Agency (IAEA)
- INIS RN
- 49030378
- Subject category
- S46: INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY;
- Descriptors DEI
- DATA ACQUISITION; DATA ACQUISITION SYSTEMS; F CODES; PERFORMANCE; READOUT SYSTEMS; TRIGGER CIRCUITS; VELOCITY
- Descriptors DEC
- COMPUTER CODES; DATA PROCESSING; ELECTRONIC CIRCUITS; PROCESSING; PULSE CIRCUITS