A dual-band frequency synthesizer for CMMB application with low phase noise

A wide-band frequency synthesizer with low phase noise is presented. The frequency tuning range is from 474 to 858 MHz which is compatible with U-band CMMB application while the S-band frequency is also included. Three VCOs with selectable sub-band are integrated on chip to cover the target frequency range. This PLL is fabricated with 0.35 μm SiGe BiCMOS technology. The measured result shows that the RMS phase error is less than 10 and the reference spur is less than -60 dBc. The proposed PLL consumes 20 mA current from a 2.8 V supply. The silicon area occupied without PADs is 1.17 mm2. (semiconductor integrated circuits)